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Title:	Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nm
Author:	Amat Bertran, Esteve; García Almudéver, Carmen; Aymerich Capdevila, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio
Other authors:	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions; Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
Abstract:	Best DCIS Paper Award 2012
Abstract:	3T1D cell has been stated as a valid alternative to be implemented on L1 memory cache to substitute 6T, highly affected by device variability. In this contribution, we have shown that 22nm 3T1D memory cells present significant tolerance to high levels of device parameter fluctuation. Moreover, we have observed that the variability of the write access transistor has turn into the more detrimental device for the 3T1D cell performance. Furthermore, resizing and temperature control have been presented as some strategies to mitigate the cell variability.
Abstract:	Peer Reviewed
Abstract:	Award-winning
Subject(s):	-Dynamic random-access memory -DRAM -variability -DRAM -temperature -Memòries electròniques d'accés aleatori
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Document type:	Article - Draft Conference Object
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