To access the full text documents, please follow this link: http://hdl.handle.net/2117/20247
Title: | An energy-efficient and scalable eDRAM-based register file architecture for GPGPU |
---|---|
Author: | Jing, Naifeng; Shen, Yao; Lu, Yao; Ganapathy, Shrikanth; Mao, Zhigang; Guo, Minyi; Canal Corretger, Ramon; Liang, Xiaoyao |
Other authors: | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
Abstract: | |
Abstract: | |
Subject(s): | -Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors -Computer architecture -Program processors -Computer architecture -Data processing -Energy efficiency -Logic design -Arquitectura d'ordinadors |
Rights: | Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
Document type: | Article - Published version Conference Object |
Published by: | ACM |
Share: |