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Title:
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High level queuing architecture model for high-end processors
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Author:
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Roca Marí, Damián
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Other authors:
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Nemirovsky, Mario; Moreto Planas, Miquel |
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Abstract:
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We have developed a new kind of simulator based in queue models and statistical methods. It allows a fast and accurate simulation. It is really useful to perform a really fast design space exploration. We have validated the model against a real chip, Intel Ivy Bridge Processor |
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Subject(s):
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
-Computer architecture
-Simulació
-Teoria de cues
-Metodes estadístics
-Processador
-Arquitectura de Computadors
-Simulation
-Queue models
-statistical methods
-processor
-computer architecture
-Arquitectura d'ordinadors |
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Rights:
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Document type:
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Research/Master Thesis |
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Published by:
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Universitat Politècnica de Catalunya
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Share:
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