Título:
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Modeling high-performance wormhole NoCs for critical real-time embedded systems
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Autor/a:
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Panic, Milos; Hernández, Carles; Quiñones, Eduardo; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier
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Otros autores:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
Abstract:
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Manycore chips are a promising computing platform to cope with the increasing performance needs of critical real-time embedded systems (CRTES). However, manycores adoption by CRTES industry requires understanding task's timing behavior when their requests use manycore's network-on-chip (NoC) to access hardware shared resources. This paper analyzes the contention in wormhole-based NoC (wNoC) designs - widely implemented in the high-performance domain - for which we introduce a new metric: worst-contention delay (WCD) that captures wNoC impact on worst-case execution time (WCET) in a tighter manner than the existing metric, worst-case traversal
time (WCTT). Moreover, we provide an analytical model of the WCD that requests can suffer in a wNoC and we validate it against wNoC designs resembling those in the Tilera-Gx36 and the Intel-SCC 48-core processors. Building on top of our WCD analytical model, we analyze the impact on WCD that different design parameters such as the number of virtual channels, and we make a set of recommendations on what wNoC setups to use in the context of CRTES. |
Abstract:
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Peer Reviewed |
Materia(s):
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors -Multiprocessors -Embedded computer systems -Logic design -Analytical models -Network-on-chip -Real time systems -VLSI circuits -Computing platform -Design parameters -Network-on-chip(NoC) -Real-time embedded systems -Shared resources -Traversal time -Virtual channels -Worst-case execution time -Multiprocessadors -Ordinadors immersos, Sistemes d' -Estructura lògica |
Derechos:
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Tipo de documento:
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Artículo - Versión presentada Objeto de conferencia |
Editor:
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Institute of Electrical and Electronics Engineers (IEEE)
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