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Título:	Quasi-digital low-dropout voltage regulators uses controlled pass transistors
Autor/a:	Saberkari, Alireza; Martínez García, Herminio; Alarcón Cot, Eduardo José
Otros autores:	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits
Abstract:	This article presents a low quiescent current output capacitorless quasi-digital CMOS LDO regulator with controlled pass transistors according to load demands. The pass transistor of the LDO is broken up to two smaller sizes based on a breakup criterion defined here, which considers the maximum output voltage variations to different load current steps to find the suitable current boundary for breaking up. This criterion shows that low load conditions will cause more output variations and settling time if the pass transistor is used in its maximum size. Therefore, using one smaller transistor for low load currents, and another one larger for higher currents, is the best trade-off between output variations, complexity, and power dissipation. The proposed LDO regulator has been designed and post-simulated in HSPICE in a 0.35 µm CMOS process to supply a load current between 0-100 mA while consumes 7.6 µA quiescent current. The results reveal 46% and 69% improvement on the output voltage variations and settling time, respectively.
Materia(s):	-Àrees temàtiques de la UPC::Enginyeria electrònica -Electronic systems -Low-Dropout (LDO) Voltage Regulators. -Sistemes electrònics
Derechos:	http://creativecommons.org/licenses/by-nc-nd/3.0/es/
Tipo de documento:	Artículo - Versión publicada Objeto de conferencia
Editor:	Universidad Miguel Hernández de Elche
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