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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor.author | Vera Rivera, Francisco Javier |
dc.contributor.author | Abella Ferrer, Jaume |
dc.contributor.author | Carretero Casado, Javier Sebastián |
dc.contributor.author | Chaparro Valero, Pedro Alonso |
dc.contributor.author | González Colás, Antonio María |
dc.date | 2009-06 |
dc.identifier.citation | Vera, X. [et al.]. Online error detection and correction of erratic bits in register files. A: IEEE International On-Line Testing Symposium. "IEEE International On-Line Testing Symposium". Sesimbra-Lisbon: 2009, p. 81-86. |
dc.identifier.citation | 978-1-4244-4595-0 |
dc.identifier.uri | http://hdl.handle.net/2117/8401 |
dc.language.iso | eng |
dc.relation | http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=5195974&isYear=2009 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | CMOS integrated circuits |
dc.subject | Errors (Computer sience) |
dc.subject | Errors -- Processament de dades |
dc.title | Online error detection and correction of erratic bits in register files |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract |