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| dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
|---|---|
| dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
| dc.contributor.author | Bieschewski, Stefan |
| dc.contributor.author | Parcerisa Bundó, Joan Manuel |
| dc.contributor.author | González Colás, Antonio María |
| dc.date | 2016-08-01 |
| dc.identifier.citation | Bieschewski, S., Parcerisa, Joan-Manuel, González, A. An energy-efficient memory unit for clustered microarchitectures. "IEEE transactions on computers", 1 Agost 2016, vol. 65, núm. 8, p. 2631-2637. |
| dc.identifier.citation | 0018-9340 |
| dc.identifier.citation | 10.1109/TC.2015.2493518 |
| dc.identifier.uri | http://hdl.handle.net/2117/90303 |
| dc.description.abstract | Whereas clustered microarchitectures themselves have been extensively studied, the memory units for these clustered microarchitectures have received relatively little attention. This article discusses some of the inherent challenges of clustered memory units and shows how these can be overcome. Clustered memory pipelines work well with the late allocation of load/store queue entries and physically unordered queues. Yet this approach has characteristic problems such as queue overflows and allocation patterns that lead to deadlocks. We propose techniques to solve each of these problems and show that a distributed memory unit can offer significant energy savings and speedups over a centralized unit. For instance, compared to a centralized cache with a load/store queue of 64/24 entries, our four-cluster distributed memory unit with load/store queues of 16/8 entries each consumes 31 percent less energy and performs 4,7 percent better on SPECint and consumes 36 percent less energy and performs 7 percent better for SPECfp. |
| dc.description.abstract | Peer Reviewed |
| dc.language.iso | eng |
| dc.relation | http://ieeexplore.ieee.org/document/7303897/?arnumber=7303897 |
| dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2013-44375-R |
| dc.rights | info:eu-repo/semantics/openAccess |
| dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| dc.subject | Cache memory |
| dc.subject | Microprocessors |
| dc.subject | Cache memories |
| dc.subject | Parallel architectures |
| dc.subject | Distributed architectures |
| dc.subject | Clustered architectures |
| dc.subject | Store buffer |
| dc.subject | Memòria ràpida de treball (Informàtica) |
| dc.subject | Microprocessadors |
| dc.title | An energy-efficient memory unit for clustered microarchitectures |
| dc.type | info:eu-repo/semantics/submittedVersion |
| dc.type | info:eu-repo/semantics/article |
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