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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. AHA - Arquitectures Hardware Avançades |
dc.contributor.author | Sripad T A, Athul |
dc.contributor.author | Sánchez Rivera, Giovanny |
dc.contributor.author | Zapata Rodríguez, Mireya |
dc.contributor.author | Pirrone, Vito |
dc.contributor.author | Dorta Pérez, Silvestre Taho |
dc.contributor.author | Cambria, Salvatore |
dc.contributor.author | Marti, Albert |
dc.contributor.author | Krishnamourthy, Karthikeyan |
dc.contributor.author | Madrenas Boadas, Jordi |
dc.date | 2018-01-01 |
dc.identifier.citation | Sripad T A, A., Sanchez , G., Zapata, M., Pirrone, V., Dorta, S., Cambria, S., Marti, A., Krishnamourthy, K., Madrenas, J. SNAVA—A real-time multi-FPGA multi-model spiking neural network simulation architecture. "Neural networks", 1 Gener 2018, vol. 97, núm. January 2018, p. 28-45. |
dc.identifier.citation | 0893-6080 |
dc.identifier.citation | 10.1016/j.neunet.2017.09.011 |
dc.identifier.uri | http://hdl.handle.net/2117/116840 |
dc.language.iso | eng |
dc.relation | http://www.sciencedirect.com/science/article/pii/S0893608017302150?via%3Dihub |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica |
dc.subject | Neural networks (Computer science) |
dc.subject | Digital neural simulation |
dc.subject | FPGA |
dc.subject | Neuromorphic systems |
dc.subject | SNNs |
dc.subject | Xarxes neuronals (Informàtica) |
dc.title | SNAVA—A real-time multi-FPGA multi-model spiking neural network simulation architecture |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/article |
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