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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | González Colás, Antonio María |
dc.contributor.author | González González, José |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 1998 |
dc.identifier.citation | González, A., González, J., Valero, M. Virtual-physical registers. A: International Symposium on High-Performance Computer Architecture. "1998 Fourth International Symposium on High-Performance Computer Architecture: Las Vegas, Nevada, February 1-4, 1998: proceedings". Las Vegas, Nevada: Institute of Electrical and Electronics Engineers (IEEE), 1998, p. 175-184. |
dc.identifier.citation | 0-8186-8323-6 |
dc.identifier.citation | 10.1109/HPCA.1998.650557 |
dc.identifier.uri | http://hdl.handle.net/2117/101917 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/document/650557/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Microprocessors |
dc.subject | Parallel processing (Electronic computers) |
dc.subject | Processor scheduling |
dc.subject | Virtual storage |
dc.subject | Storage allocation |
dc.subject | Software performance evaluation |
dc.subject | Naming services |
dc.subject | Instruction sets |
dc.subject | Microprogramming |
dc.subject | Microprocessadors |
dc.subject | Processament en paral·lel (Ordinadors) |
dc.title | Virtual-physical registers |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
dc.description.abstract |