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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Titos Gil, Rubén |
dc.contributor.author | Acacio, Manuel E. |
dc.contributor.author | García, José M. |
dc.contributor.author | Harris, Tim |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.author | Unsal, Osman Sabri |
dc.contributor.author | Hur, Ibrahim |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2010 |
dc.identifier.citation | Titos.-Gil, R., Acacio, M. E., García, J., Harris, T., Cristal, A., Unsal, O., Hur, I., Valero, M. Hardware transactional memory with software-defined conflicts. A: ACM SIGPLAN Workshop on Transactional Computing. "ACM SIGPLAN Workshop on Transactional Computing, Paris, France, April 13, 2010". Paris: 2010, p. 1-8. |
dc.identifier.uri | http://hdl.handle.net/2117/109399 |
dc.language.iso | eng |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Multiprocessors |
dc.subject | Hardware transactional memory |
dc.subject | Software defined conflicts |
dc.subject | Transactional conflict |
dc.subject | Fixed definition |
dc.subject | Atomic language |
dc.subject | Coarse synchronization |
dc.subject | TM programming model |
dc.subject | Multiprocessadors |
dc.title | Hardware transactional memory with software-defined conflicts |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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