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Title:
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Cache side-channel attacks and time-predictability in high-performance critical real-time systems
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Author:
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Trilla, David; Hernandez, Carles; Abella, Jaume; Cazorla, Francisco J.
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Other authors:
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Barcelona Supercomputing Center |
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Abstract:
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Embedded computers control an increasing number of systems directly interacting with humans, while also manage more and more personal or sensitive information. As a result, both safety and security are becoming ubiquitous requirements in embedded computers, and automotive is not an exception to that. In this paper we analyze time-predictability (as an example of safety concern) and side-channel attacks (as an example of security issue) in cache memories. While injecting randomization in cache timing-behavior addresses each of those concerns separately, we show that randomization solutions for time-predictability do not protect against side-channel attacks and vice-versa. We then propose a randomization solution to achieve both safety and security goals. |
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Abstract:
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This work has been partially funded by the Spanish Ministry of Science and Innovation under grant TIN2015-65316-P. Jaume Abella
has been partially supported by the Ministry of Economy and Competitiveness under Ramon y Cajal fellowship number RYC-2013-14717. Authors want to thank Boris Kpf for his technical comments in early versions of this work. |
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Abstract:
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Peer Reviewed |
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Subject(s):
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-Àrees temàtiques de la UPC::Enginyeria electrònica
-High performance computing
-Cache
-Randomization
-Side-channel attacks
-Probabilistic analysis
-Supercomputadors |
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Rights:
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Document type:
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Article - Published version
Conference Object |
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Published by:
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Association for Computing Machinery (ACM)
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Share:
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