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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
dc.contributor.author | Marranghello, Felipe S. |
dc.contributor.author | Dal Bem, Vinicius |
dc.contributor.author | Reis, André I. |
dc.contributor.author | Ribas, Renato P. |
dc.contributor.author | Moll Echeto, Francisco de Borja |
dc.date | 2011 |
dc.identifier.citation | Marranghello, F. [et al.]. Transistor sizing analysis of regular fabrics. A: Exploiting Regularity in the Design of IPs, Architectures and Platforms. "1st Workshop on Exploiting Regularity in the Design of IPs, Architectures and Platforms". Como: 2011, p. 235-242. |
dc.identifier.citation | 978-3-8007-3333-0 |
dc.identifier.uri | http://hdl.handle.net/2117/12138 |
dc.language.iso | eng |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject | Resolution Enhancement Techniques |
dc.subject | Regular Transistor Fabric |
dc.subject | Electronic engineering |
dc.subject | Electrònica |
dc.title | Transistor sizing analysis of regular fabrics |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract |