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Títol: | Low–quiescent current output–capacitorless class–AB CMOS low–dropout regulator |
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Autor/a: | Asefi, Saina; Saberkari, Alireza; Martínez García, Herminio; Alarcón Cot, Eduardo José |
Altres autors: | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits |
Abstract: | This paper presents an output-capacitorless class-AB low-dropout (LDO) regulator with load current sinking and sourcing ability. The proposed LDO consists of two complementary pass transistors, controlled using a level shifter technique. The transient improvement section applied to the gates of the pass devices enhances the transient performance of the LDO. The proposed LDO is designed in TSMC 0.18 µm CMOS process with input and output voltages of 1.2-2.5 V and 1 V, respectively, 10 pF output capacitor, and quiescent current of 3.14 µA, and is capable to sink and source maximum load currents of ±100 mA, giving the current efficiency of 99.99%. |
Abstract: | Peer Reviewed |
Matèries: | -Àrees temàtiques de la UPC::Enginyeria electrònica -Electronic systems -low-dropout regulator -class-AB LDO -complementary pass transistors -level shifter -sink and source. -Sistemes electrònics |
Drets: | Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
Tipus de document: | Article - Versió publicada Objecte de conferència |
Publicat per: | Institute of Electrical and Electronics Engineers (IEEE) |
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