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Título:
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Leveraging run-time feedback for efficient ASR acceleration
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Autor/a:
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Yazdani, Reza; Arnau Montañés, José María; González Colás, Antonio María
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Otros autores:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
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Abstract:
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Abstract:
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In this work, we propose Locality-AWare-Scheme (LAWS) for an Automatic Speech Recognition (ASR) accelerator in order to significantly reduce its energy consumption and memory requirements, by leveraging the locality among consecutive segments of the speech signal. LAWS diminishes ASR's workload by up to 60% by removing most of the off-chip accesses during the ASR's decoding process. We furthermore improve LAWS's effectiveness by selectively adapting the amount of ASR's workload, based on run-time feedback. In particular, we exploit the fact that the confidence of the ASR system varies along the recognition process. When confidence is high, the ASR system can be more restrictive and reduce the amount of work. The end design provides a saving of 87% in memory requests, 2.3x reduction in energy consumption, and a speedup of 2.1x with respect to the state-of-the-art ASR accelerator. |
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Abstract:
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Peer Reviewed |
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Materia(s):
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
-Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Processament del senyal::Processament de la parla i del senyal acústic
-Parallel programming (Computer science)
-Automatic speech recognition
-Automatic speech recognition (ASR)
-Viterbi search
-Hardware accelerator
-Memory-efficient
-Programació en paral·lel (Informàtica)
-Reconeixement automàtic de la parla |
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Derechos:
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Tipo de documento:
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Artículo - Versión presentada
Objeto de conferencia |
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Editor:
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Institute of Electrical and Electronics Engineers (IEEE)
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