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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Acosta Ojeda, Carmelo Alexis |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.contributor.author | Ramírez Bellido, Alejandro |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2008 |
dc.identifier.citation | Acosta, C. A.; Cazorla, F.; Ramírez, A.; Valero, M. MFLUSH: handling long-latency loads in SMT on-chip multiprocessors. A: International Conference on Parallel Processing. "37th International Conference on Parallel Processing: Portland, Oregon, September 9-12, 2008: proceedings ". IEEE Computer Society Publications, 2008, p. 173-181. |
dc.identifier.citation | 978-0-7695-3374-2 |
dc.identifier.citation | 10.1109/ICPP.2008.48 |
dc.identifier.uri | http://hdl.handle.net/2117/12678 |
dc.language.iso | eng |
dc.publisher | IEEE Computer Society Publications |
dc.relation | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4625847 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Computer storage devices -- Design and construction |
dc.subject | Multiprocessors -- Design and construction |
dc.subject | Cache memory |
dc.subject | Memòria (informàtica) |
dc.title | MFLUSH: handling long-latency loads in SMT on-chip multiprocessors |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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