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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
dc.contributor.author | Pouyan, Peyman |
dc.contributor.author | Amat Bertran, Esteve |
dc.contributor.author | Barajas Ojeda, Enrique |
dc.contributor.author | Rubio Sola, Jose Antonio |
dc.date | 2014 |
dc.identifier.citation | Pouyan, P. [et al.]. Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches. A: International Symposium on Quality Electronic Design. "Proceedings - International Symposium on Quality Electronic Design". Santa Clara: 2014, p. 32-38. |
dc.identifier.citation | 978-147993946-6 |
dc.identifier.citation | 10.1109/ISQED.2014.6783303 |
dc.identifier.uri | http://hdl.handle.net/2117/24778 |
dc.language.iso | eng |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject | BTI |
dc.subject | Process Variation |
dc.subject | Reconfiguration |
dc.subject | SRAM |
dc.subject | Vmin |
dc.subject | Memòries digitals |
dc.title | Impact of adaptive proactive reconfiguration technique on Vmin and lifetime of SRAM caches |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract |