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dc.contributor | Barcelona Supercomputing Centre |
---|---|
dc.contributor | Jiménez González, Daniel |
dc.contributor | Martorell Bofill, Xavier |
dc.contributor.author | Cano Díaz, Ruben |
dc.date | 2018-06-03 |
dc.identifier.citation | 134631 |
dc.identifier.uri | http://hdl.handle.net/2117/122560 |
dc.language.iso | spa |
dc.publisher | Universitat Politècnica de Catalunya |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica |
dc.subject | Software engineering |
dc.subject | Memory hierarchy (Computer science) |
dc.subject | OmpSs |
dc.subject | OmpSs-2 |
dc.subject | FPGA |
dc.subject | BSC |
dc.subject | Nanos |
dc.subject | Nanos6 |
dc.subject | Nanox |
dc.subject | c++ |
dc.subject | fortran |
dc.subject | runtime |
dc.subject | hardware |
dc.subject | software |
dc.subject | computadors |
dc.subject | Informàtica |
dc.subject | FIB |
dc.subject | Xilinx |
dc.subject | memoria |
dc.subject | arm |
dc.subject | scheduling |
dc.subject | linux |
dc.subject | computer |
dc.subject | architecture |
dc.subject | pinned |
dc.subject | memory |
dc.subject | arquitectura |
dc.subject | Enginyeria de programari |
dc.subject | Jerarquia de memòria (Informàtica) |
dc.title | Diseño e implementación del soporte para FPGA en OmpSs-2 |
dc.type | info:eu-repo/semantics/bachelorThesis |
dc.description.abstract | |
dc.description.abstract |