Efficient bit-level design of an on-board digital TV demultiplexer

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RECERCAT Home > Universitat Politècnica de Catalunya > Documents de recerca > View document

To access the full text documents, please follow this link: http://hdl.handle.net/2117/88670

dc.contributor	Universitat Politècnica de Catalunya. Departament de Teoria del Senyal i Comunicacions
dc.contributor	Universitat Politècnica de Catalunya. SPCOM - Grup de Recerca de Processament del Senyal i Comunicacions
dc.contributor.author	Sala Álvarez, José
dc.contributor.author	Pagès Zamora, Alba Maria
dc.contributor.author	Vázquez Grau, Gregorio
dc.date	1998
dc.identifier.citation	Sala, J., Pages, A., Vazquez, G. Efficient bit-level design of an on-board digital TV demultiplexer. A: European Signal Processing Conference. "EUSIPCO 1998: Signal processing IX: theories and applications; proceedings of Eusipco-98, Ninth European Signal Processing Conference: Rhodes, Greece: 8-11 September 1998". Rhodes: 1998, p. 885-889.
dc.identifier.citation	960-7620-06-4
dc.identifier.uri	http://hdl.handle.net/2117/88670
dc.language.iso	eng
dc.relation	http://ieeexplore.ieee.org.recursos.biblioteca.upc.edu/stamp/stamp.jsp?tp=&arnumber=7090005
dc.rights	info:eu-repo/semantics/openAccess
dc.rights	http://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subject	Àrees temàtiques de la UPC::Enginyeria de la telecomunicació
dc.subject	Digital television
dc.subject	Signal processing
dc.subject	VLSI
dc.subject	Demultiplexing equipment
dc.subject	Digital television
dc.subject	Signal processing
dc.subject	Televisió digital
dc.subject	Tractament del senyal
dc.title	Efficient bit-level design of an on-board digital TV demultiplexer
dc.type	info:eu-repo/semantics/publishedVersion
dc.type	info:eu-repo/semantics/conferenceObject
dc.description.abstract	A bit-level description of the signal processing stage of an on-board integrated VLSI multi-carrier demodulator is presented in this paper, along with a description of the optimization procedure that has been developed for the signal processing functions1. The demultiplexer is capable of handling a varying number of carriers in a 36 MHz bandwidth on the satellite up-link. Its architecture has been optimized at bit-level in a way dependent on the known input signal statistics and carrier distributions allowed by the frequency plan.
dc.description.abstract	Peer Reviewed

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