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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor.author | Grigorios, Magklis |
dc.contributor.author | González González, José |
dc.contributor.author | González Colás, Antonio María |
dc.date | 2004 |
dc.identifier.citation | Grigorios, M., González, J., González, A. Frontend frequency-voltage adaptation for optimal energy-delay/sup 2/. A: IEEE International Conference on Computer Design: VLSI in Computers and Processors. "IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004, ICCD 2004: proceedings". San Jose, CA: Institute of Electrical and Electronics Engineers (IEEE), 2004, p. 250-255. |
dc.identifier.citation | 0-7695-2231-9 |
dc.identifier.citation | 10.1109/ICCD.2004.1347930 |
dc.identifier.uri | http://hdl.handle.net/2117/96553 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/document/1347930/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Microprocessors |
dc.subject | Frequency |
dc.subject | Clocks |
dc.subject | Power dissipation |
dc.subject | Microarchitecture |
dc.subject | Dynamic voltage scaling |
dc.subject | Wire |
dc.subject | Delay |
dc.subject | Control systems |
dc.subject | Microprocessadors |
dc.title | Frontend frequency-voltage adaptation for optimal energy-delay/sup 2/ |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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