Energy Analysis of a 4D Variational Data Assimilation Algorithm and Evaluation on ARM-Based HPC Systems

Abstract

Driven by the emerging requirements of High Performance Computing (HPC) architectures, the main focus of this work is the interplay of computational and energetic aspects of a Four Dimensional Variational (4DVAR) Data Assimilation algorithm, based on Domain Decomposition (named DD-4DVAR). We report first results on the energy consumption of the DD-4DVAR algorithm on embedded processor and a mathematical analysis of the energy behavior of the algorithm by assuming the architectures characteristics as variable of the model. The main objective is to capture the essential operations of the algorithm exhibiting a direct relationship with the measured energy. The experimental evaluation is carried out on a set of mini-clusters made available by the Barcelona Supercomputing Center.

The research has received funding from European Commission under H2020-MSCA-RISE NASDAC project (grant agreement no. 691184) FP7 Mont-Blanc and Mont-Blanc 2 (grant agreements no. 288777 and 610402), H2020-FET Mont-Blanc 3 (grant agreement 671697).

Peer Reviewed

Postprint (author's final draft)