Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits
2018-03-20
This paper presents an approach to utilize of sliding-mode (SM) controller in digital low-dropout/linear regulators. Various design aspects, including the extraction of the regulator state-space model and sliding coefficients by considering the hitting, existence, and stability conditions are described. Moreover, the freeze control block is introduced as a solution to compensate the high frequency chattering phenomenon of SM, resulting in reduction of switching losses. In order to verify the statements, a quasi digital low-dropout/linear regulator (QDLDO) is implemented in a discrete form on a PCB. The circuit consists of the proposed current-mode current feedback amplifier (CFA)-based SM controller and switchedmode PMOS array driven by a bidirectional serial shift register, which is controlled by the SM controller. The results reveal that the controller detects the load changes rapidly, and eliminates the output limit-cycle oscillation, providing a robust and stable output voltage.
Peer Reviewed
Postprint (author's final draft)
Article
English
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats; Integrated circuits; Regulators; Shift registers; Trajectory; Clocks; Capacitors; Integrated circuits; Circuits integrats
https://ieeexplore.ieee.org/document/8320310/
Open Access
E-prints [73012]