Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement

dc.contributor
Barcelona Supercomputing Center
dc.contributor.author
Cardona, Jordi
dc.contributor.author
Hernandez, Carles
dc.contributor.author
Abella Ferrer, Jaume
dc.contributor.author
Cazorla, Francisco J.
dc.date.issued
2019-04-16
dc.identifier
Cardona, J. [et al.]. Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement. A: "2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)". IEEE, 2019, p. 710-715.
dc.identifier
978-3-9819263-2-3
dc.identifier
https://hdl.handle.net/2117/133656
dc.identifier
10.23919/DATE.2019.8715155
dc.description.abstract
In real-time systems, the techniques to derive bounds to the contention tasks can suffer in multicore build on resource quota monitoring and enforcement. Existing techniques track and bound the number of requests to hardware shared resources that each core (task) is allowed to perform. In this paper we show that current software-only solutions work well when there is a single resource and type of request to track and bound, but do not scale to the more general case of several shared resources that accept different request types, each with a different associated latency. To handle this (more general) case, we propose low-overhead hardware support called Maximum-Contention Control Unit (MCCU). The MCCU performs fine-grain tracking of different types of requests, preventing a core to cause more interference on its contenders than budgeted. In this process, the MCCU also helps verifying that individual requests duration does not exceed their theoretical bounds, hence dealing with scenarios in which requests can have an arbitrarily large duration.
dc.description.abstract
This work has been partially supported by the Spanish Ministry of Economy and Competitiveness (MINECO) under grant TIN2015-65316-P, the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement No. 772773) and the HiPEAC Network of Excellence. Carles Hernández is jointly funded by the MINECO and FEDER funds through grant TIN2014-60404-JIN. Jaume Abella has been partially supported by the MINECO under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717.
dc.description.abstract
Peer Reviewed
dc.description.abstract
Postprint (author's final draft)
dc.format
6 p.
dc.format
application/pdf
dc.language
eng
dc.publisher
IEEE
dc.relation
https://ieeexplore.ieee.org/abstract/document/8715155
dc.relation
info:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/
dc.relation
info:eu-repo/grantAgreement/MINECO//TIN2014-60404-JIN/ES/PROBABILISTIC TIMING ANALYSIS OF HIGH-PERFORMANCE AND RELIABLE PROCESSORS/
dc.relation
info:eu-repo/grantAgreement/MINECO//RYC-2013-14717/ES/RYC-2013-14717/
dc.rights
Open Access
dc.subject
Àrees temàtiques de la UPC::Informàtica
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High performance computing
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Task analysis
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Multicore processing
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Hardware
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Monitoring
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Program processors
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Timing
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Aerospace electronics
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Supercomputadors
dc.title
Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement
dc.type
Conference lecture


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