dc.contributor
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.contributor
Moll Echeto, Francisco de Borja
dc.contributor.author
Palma Carmona, Kenneth
dc.date.issued
2019-10-14
dc.identifier
https://hdl.handle.net/2117/172463
dc.identifier
ETSETB-230.145194
dc.description.abstract
This thesis presents the derivation and validation processes of analytical models describing the dynamic and steady-state behaviors of CC-CP switched capacitor converters. The effects of FDSOI components in the implementation of such circuits is also addressed, studying their impact as compared to ideal models. Finally, the layout of a CMOS CC-CP in 28-nm UTBB-FDSOI technology is designed and tested against predicted functionality.
dc.format
application/pdf
dc.publisher
Universitat Politècnica de Catalunya
dc.rights
S'autoritza la difusió de l'obra mitjançant la llicència Creative Commons o similar 'Reconeixement-NoComercial- SenseObraDerivada'
dc.rights
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subject
Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència
dc.subject
Low voltage systems
dc.subject
Electronic circuits
dc.subject
switched-capacitor
dc.subject
ultra low voltage
dc.subject
Circuits electrònics
dc.title
Body bias generator design for ultra-low voltage applications in FDSOI technology
