Remote system upgrade of FPGA devices

Abstract

The goal of the master's thesis is to design, implement and validate a remote system upgrade of a flash-FPGA. A firmware is to be uploaded by using either an SPI or Ethernet interface into the flash-FPGA achieving an update without the use of a JTAG. In order to do so, a flash core "wrapper" will be developed converting from SPI or Ethernet to an Avalon Memory Mapped master. Moreover, a dual image flash-fpga feature will be assessed and implemented in order to address backup functionalities.

An electronic device may require upgrades on its firmware after being launched, ranging from bug fixing to the implementation of new features. This master's thesis presents a remote system upgrade for an INTEL MAX10 FPGA device integrated in a Technica Electronics product with an hybrid uC/FPGA architecture. The remote system upgrade receives and programs a binary into the FPGA device addressing two transmission interfaces, SPI and Ethernet. The system comprises an FPGA-based logic block responsible for the flashing of the own FPGA, and an embedded system block acting as the controller of the system itself. In addition, the project includes a second part where a boot-safe system has been integrated for the different FPGA devices present in the uC/FPGA hybrid architecture device. Ensuring a successful boot up of the FPGA devices even if an error occurred during the flashing of the device.