Evaluation of joint controller placement for latency and reliability-aware control plane

Other authors

Universitat Politècnica de Catalunya. Doctorat en Arquitectura de Computadors

Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Universitat Politècnica de Catalunya. CBA - Sistemes de Comunicacions i Arquitectures de Banda Ampla

Publication date

2021

Abstract

The separation of the forwarding and control planes in software-defined networking provides flexibility for network management. The Controller Placement Problem (CPP) is an important issue affecting network performance. This paper presents an evaluation of the Joint Latency and Reliability-Aware Controller Placement (LRCP) optimization model. LRCP provides network administrators with flexible choices to simultaneously achieve a trade-off between the switch-To-controller latency and the controller-To-controller latency, including the reliability aspect using alternative backup paths. Control plane latency (CPL) is used as the evaluation metric and it is defined as the sum of average switch-To-controller latency and the average inter-controller latency. For each optimal placement in the network, the control plane latency using the real latencies of the real network topology is computed. Results from the control plane latency metric show how the number and location of controllers influence the reliability of the network. In the event of a single link failure, the real CPL for LRCP placements is computed and assesses how good the LRCP placements are. The CPL metric is used to compare with other models using latency and reliability metrics.


This publication is part of the Spanish I+D+i project TRAINER-A (ref. PID2020-118011GB-C21), funded by MCIN/AEI/10.13039/501100011033. This work has been also partially funded by the Spanish Ministry of Economy and Competitiveness, under contract TEC 2017-90034-C2-1-R (ALLIANCE).


Peer Reviewed


Postprint (author's final draft)

Document Type

Conference lecture

Language

English

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Related items

https://ieeexplore.ieee.org/document/9731852

info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2020-118011GB-C21/ES/INVESTIGACION EN FUTURAS REDES TOTALMENTE OPTIMIZADAS MEDIANTE INTELIGENCIA ARTIFICIAL - A/

info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TEC2017-90034-C2-1-R/ES/DISEÑANDO UNA INFRAESTRUCTURA DE RED 5G DEFINIDA MEDIANTE CONOCIMIENTO HACIA LA PROXIMA SOCIEDAD DIGITAL/

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Open Access

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E-prints [72987]