QeiHaN: An energy-efficient DNN accelerator that leverages log quantization in NDP architectures

Abstract

The constant growth of DNNs makes them challenging to implement and run efficiently on traditional computecentric architectures. Some works have attempted to enhance accelerators by adding more compute units and on-chip buffers, but they often worsen the memory issue due to increased bandwidth demands. Memory-centric designs based on Near-Data Processing (NDP) have been proposed to mitigate this problem by moving computations closer to the memory hierarchy. Leveraging 3D-stacked memory for its storage density and near-memory processing capabilities, this paper introduces QeiHaN, a hardware accelerator that optimizes DNN inference efficiency. QeiHaN employs a 3D-stacked memory-centric weight storage scheme combined with a logarithmic quantization of activations, resulting in reduced memory accesses by 25%. Evaluation demonstrates significant speedup and energy savings compared to a Neurocube-like accelerator across various DNNs.

QeiHaN has been supported by the CoCoUnit ERC Advanced Grant of EU’s Horizon 2020 (grant No 833057), Spanish State Research Agency (MCIN/AEI) under grant PID2020-113172RB-I00, and ICREA Academia program.

Peer Reviewed

Postprint (author's final draft)