A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM

Author

Darus, Rosheila

Pou Félix, Josep

Konstantinou, Georgios

Ceballos Recio, Salvador

Picas Prat, Ricard

Agelidis, Vassilios

Other authors

Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica

Universitat Politècnica de Catalunya. TIEG-P - Terrassa Industrial Electronics Group -Power

Publication date

2015-08-01

Abstract

Peer Reviewed

Postprint (author’s final draft)

Document Type

Article

Language

English

Subjects and keywords

Àrees temàtiques de la UPC::Enginyeria electrònica; Electric currents; Rotary converters; Modulation (Electronics); Capacitor voltage balancing; modular multilevel converter (MMC); modulation technique; pulse width modulation; FUNDAMENTAL SWITCHING FREQUENCY; SYSTEM; Corrents elèctrics; Convertidors rotatius; Modulació (Electrònica)

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DIDL MARC MARC_CCUC METS OAI_DC ORE QDC RDF

Rights

Open Access

This item appears in the following Collection(s)

E-prints [72986]