Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
Barcelona Supercomputing Center
Universitat Politècnica de Catalunya. PM - Programming Models
2024
This work is focused on the transparent execution of Cellular Automata models on a multi-GPU architecture. Although Cellular Automata models can be easily parallelized on a single GPU, the domain size and transition function complexity may require the use of multiple GPUs. Our goal is to allow modellers to be completely unaware of the parallel execution context, i.e., the code implementing the Cellular Automata model remains the same regardless if the execution is performed on CPU, single GPU, or multi-GPU systems. This paper supplies meaningful technical insights on how to ensure both transparency and efficiency in multi-GPU execution of Cellular Automata models. In particular, an object-oriented approach is exploited in which a transparent layer is devised that abstracts the parallelization details and allows a strong “separation of concerns” between the execution parallelism issues and the model implementation. Preliminary experiments have been carried out on the multi-GPU cluster CTE-POWER available at the Barcelona Supercomputing Center (BSC), witnessing good speedups notwithstanding the transparency feature supplied by our approach.
This research was partially funded by the Italian “ICSC National Center for HPC, Big Data and Quantum Computing” Project, CN00000013 (approved under the Call M42C – Investment 1.4 – Avviso “Centri Nazionali” - D.D. n. 3138 of 16.12.2021, admitted to financing with MUR Decree n. 1031 of 06.17.2022). This work was funded by the Next Generation EU - Italian NRRP, Mission 4, Component 2, Investment 1.5, call for the creation and strengthening of ’Innovation Ecosystems’, building ’Territorial R&D Leaders’ (Directorial Decree n. 2021/3277) - project Tech4You - Technologies for climate change adaptation and quality of life improvement, n. ECS0000009. This work was supported by Italian Ministry of Research (MUR) under PNRR projects FAIR “Future AI ResearcH” - Spoke 9 - CUP H23C22000860006. This research was partially funded by the Spanish Ministry of Education (PID2019-107255GB-C22) and the Generalitat de Catalunya (2021-SGR-01007).
Peer Reviewed
Postprint (author's final draft)
Conference report
English
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles; Cellular automata; Graphics processing units; Parallel processing (Electronic computers); Multi-GPU computing; Modelling and simulation; Autòmats cel·lulars; Unitats de processament gràfic; Processament en paral·lel (Ordinadors)
Institute of Electrical and Electronics Engineers (IEEE)
https://ieeexplore.ieee.org/document/10495562
info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2019-107255GB-C22/ES/UPC-COMPUTACION DE ALTAS PRESTACIONES VIII/
Open Access
E-prints [72954]